I’m not ready to forever dismiss the possibility of zillions of within-chip optical interconnects. There’s a UC Berkeley group (Ming Wu & Eli Yablonovitch) that’s been working towards that vision; see for example extensive analysis in Nicolas Andrade’s thesis. The analysis supposedly shows a path to 1 fJ/bit = 6000 eV/bit end-to-end. If we accept Jacob’s claimed limit of 0.1-1 eV/bit/nm (which I mostly don’t, but that’s a different topic), then (this analysis suggests) that we could do better in principle by optic-izing all interconnects longer than 6-60μm. I’m not sure what fraction of the total that is.
If that analysis is correct and replacing all interconnect greater than say 100um is viable that seems to be about 50% of the interconnect (assuming a log-uniform ish distribution). Seems unlikely to be a 10x power saver, but perhaps a 2x? (I only glanced at the paper, not sure if he has analysis more directly tackling that question)
I’m not ready to forever dismiss the possibility of zillions of within-chip optical interconnects. There’s a UC Berkeley group (Ming Wu & Eli Yablonovitch) that’s been working towards that vision; see for example extensive analysis in Nicolas Andrade’s thesis. The analysis supposedly shows a path to 1 fJ/bit = 6000 eV/bit end-to-end. If we accept Jacob’s claimed limit of 0.1-1 eV/bit/nm (which I mostly don’t, but that’s a different topic), then (this analysis suggests) that we could do better in principle by optic-izing all interconnects longer than 6-60μm. I’m not sure what fraction of the total that is.
If that analysis is correct and replacing all interconnect greater than say 100um is viable that seems to be about 50% of the interconnect (assuming a log-uniform ish distribution). Seems unlikely to be a 10x power saver, but perhaps a 2x? (I only glanced at the paper, not sure if he has analysis more directly tackling that question)