Veering even more off-topic, does anybody know if there’s an efficient way to transform this transistor-level design into logic gates? If we could do that, for the entire chip, then we could synthesize an FPGA design that’s exactly compatible with the original 6502, which would be pretty neat. Useless, but neat.
I’ve been trying to think of ways to do this, but none of my ideas sound particularly great. For example, you could probably turn a lot of the chip into logic gates by making the transistor graphs for common logic gates and using some fast subgraph isomorphism algorithm to look for those in the 6502. Of course, this won’t do everything, but it would convert at least the PLA portion of the chip. Or you could look for chunks of the transistor graph with a lot of internal transistors for every external connection, and build truth tables for them, which can be converted into logic gates.
Or there’s the worse-is-better idea: identify the parts of the chip that can hold state—registers, latches, whatever—and then assume that everything else is combinational logic, and build a truly enormous truth table for it. I’m pretty sure this is NP-complete.
Does anybody have ideas for this that don’t suck? Because I would love to have a perfect Verilog/VHDL model of the 6502.
Peter Monta has done this over the last few weeks: see his tools on github—we mention it on the visual6502 wiki. There are lots of interesting possibilities ahead...
Veering even more off-topic, does anybody know if there’s an efficient way to transform this transistor-level design into logic gates? If we could do that, for the entire chip, then we could synthesize an FPGA design that’s exactly compatible with the original 6502, which would be pretty neat. Useless, but neat.
I’ve been trying to think of ways to do this, but none of my ideas sound particularly great. For example, you could probably turn a lot of the chip into logic gates by making the transistor graphs for common logic gates and using some fast subgraph isomorphism algorithm to look for those in the 6502. Of course, this won’t do everything, but it would convert at least the PLA portion of the chip. Or you could look for chunks of the transistor graph with a lot of internal transistors for every external connection, and build truth tables for them, which can be converted into logic gates.
Or there’s the worse-is-better idea: identify the parts of the chip that can hold state—registers, latches, whatever—and then assume that everything else is combinational logic, and build a truly enormous truth table for it. I’m pretty sure this is NP-complete.
Does anybody have ideas for this that don’t suck? Because I would love to have a perfect Verilog/VHDL model of the 6502.
Peter Monta has done this over the last few weeks: see his tools on github—we mention it on the visual6502 wiki. There are lots of interesting possibilities ahead...