Thanks, Jed. I had no idea they depended so heavily on actual physics simulations of their chips.
One of the key steps in this argument, it seems to me, is that chip engineering of the sort Intel does, relies on the fastest serial speeds available, because parallelizing is programmatically difficult. Right now, unless I’ve missed something, Intel is trying to transition to a multi-core strategy for following Moore’s Law and the serial speeds have flatlined. Would you be willing to predict a slowdown in Moore’s Law for transistors per square inch, or for the number of cores, now or in another 5-10 years, on the basis that Intel will no longer be getting the serial speed increases they need in order to keep up with Moore’s Law?
Thanks, Jed. I had no idea they depended so heavily on actual physics simulations of their chips.
One of the key steps in this argument, it seems to me, is that chip engineering of the sort Intel does, relies on the fastest serial speeds available, because parallelizing is programmatically difficult. Right now, unless I’ve missed something, Intel is trying to transition to a multi-core strategy for following Moore’s Law and the serial speeds have flatlined. Would you be willing to predict a slowdown in Moore’s Law for transistors per square inch, or for the number of cores, now or in another 5-10 years, on the basis that Intel will no longer be getting the serial speed increases they need in order to keep up with Moore’s Law?