Those two links are the same. But yeah I’m referring to the latter, w.r.t fuzzing of the synthesized devices.
“Fuzzing” as a concept is used, but not very “block-level” (some some exceptions, e.g. you likely know about UVM’s support for random data streams, coming from an FPGA background). The fuzzing analogue in hardware might be called “constrained random verification”.
Fuzzing as I’ve heard it referenced is more of a jargon used in the software security world, the aforementioned AFL fuzzer being one example.
I do agree that traditional fuzzing isn’t used in hardware is rather surprising to me.
Maybe one reason fuzzing isn’t used more is that it is harder to detect failure? You don’t get page faults or exceptions or some such with hardware. What is your idea there?
Those two links are the same. But yeah I’m referring to the latter, w.r.t fuzzing of the synthesized devices.
“Fuzzing” as a concept is used, but not very “block-level” (some some exceptions, e.g. you likely know about UVM’s support for random data streams, coming from an FPGA background). The fuzzing analogue in hardware might be called “constrained random verification”.
Fuzzing as I’ve heard it referenced is more of a jargon used in the software security world, the aforementioned AFL fuzzer being one example.
I do agree that traditional fuzzing isn’t used in hardware is rather surprising to me.
ups. corrected.
Didn’t know UVMs.
Maybe one reason fuzzing isn’t used more is that it is harder to detect failure? You don’t get page faults or exceptions or some such with hardware. What is your idea there?